The present invention relates to an apparatus for generating an enlargement/reduction signal. More particularly, the present invention relates to an apparatus for generating an enlargement/reduction signal to enlarge or reduce image data in a digital image-forming apparatus or the like.
Recently, the digital processing of image information has been increasingly utilized in the field of image-forming apparatuses. A digital copying machine, for example, is generally comprised of a scanner and a printer. The scanner scans the original. Then, the latent images of the original are digitalized and processed thereby as signal compensation, and are output to the printer. In the printer, a laser unit performs corresponding to the digitalized image data, and a print unit prints images on sheets of paper material.
Owing to the particular nature of digital copying machines, various image-processing functions arise. One of the functions has been the provision of various methods of image enlargement and reduction. In an ordinary method, enlargement and reduction are carried out by controlling clock pulses for generating reading addresses (referred to as reading clock pulses below), and clock pulses for generating writing addresses (referred to as writing clock pulses below) between two memories.
For example, in the case in which image data is magnified twice, the data read with clock pulses is written with other clock pulses having a frequency twice as much as that of the reading clock, so that each of picture element is written twice, and thereby the image data is magnified twice.
Circuits for enlargement and reduction such as described in the above are disclosed, for example, in Japanese Patent Laid-Open 1974/1975 and Japanese Patent Laid-Open 83988/1975. According to the former publication, addresses and reading/writing operations of input data line buffers and output data line buffers with respect to the main scanning direction are controlled corresponding to an enlargement/reduction ratio. When image data in the input data line buffer is written into the output data line buffer, each one bit in the input data line buffer is transformed to data of two bits in the output data line buffer, whereby double enlargement is carried out. In the enlargement process, if image data of one line has a uniform level, it is not changed after processing for enlargement/reduction; therefore the enlargement process of the image data is omitted, in which case the process time is shortened.
According to the latter publication, the circuit has more than two data selectors which receive signals in parallel to be enlarged. Output signals from the selectors are controlled, whereby enlarged signal data is made from the combinations of the output signals of the data selectors. However, the enlargement/reduction circuits disclosed in the above publications can magnify image data only in integral proportions. Therefore, the conventional enlargement/reduction circuits cannot be applied in the case of copying machines which recently have been required to have a zooming function.